R&D LAB 3.1 "MULTIPROCESSOR REAL-TIME SYSTEMS"



 

 

 

 

 

 

FIELD OF EXPERTISE

  • Design of problem-oriented real-time computer aids for digital signal processing, in particular, for speech and audio signal processing; as well as for image compression based on multipass wavelet decomposition, para-unitary filter bank and quaternion algebra 
  • Development of the theory of digital filter bank synthesis and its rapid prototyping techniques for further application in hearing devices
  • Development of image compression methods based on lossy-to-lossless (L2L) principle enabling either lossy or lossless compression
  • Development of separable and non-separable transform methods for digital image processing solutions
  • Design of heterogeneous problem-oriented multiprocessor real-time systems based on MPSoC and FPSoC
  • Development of deep-learning methods for multimedia data compression and recognition solutions
  • Creating of scientific foundations for anthropomorphic analysis and parametric presentation of speech signal in the form of quasi-periodic and stochastic components in order to obtain specific time- and frequency-localized signal description related to the physical process of speech-formation; thus, it could be easily interpreted in the terms of the basic prosodic parameters and could help find new solutions for the designing of low-rate vocoders and noise-suppression systems in the speech signal flow, as well as obtain more efficient solutions for speech recognition and speaker identification
  • Development of systematic and mathematic approaches for representation, synthesis and implementation of dynamically reconfigurable real-time processors for multimedia systems, in particular, synthesis of virtually implemented operators for dynamic transformation of computational algorithm for discrete batch wavelet transformation to fit the given time-frequency plan
  • Crypto-accelerators based on FPGA and FPGA clusters

 

PRODUCTS

  • Mobile application ALS EXPERT
  • Application for a personal computer RITOR
  • Embedded hardware IP cores of decoder processor of the AVC/MPEG4 part 10 H.264 standard and of context-adaptive binary arithmetic CABAC coding decoder
  • Programme modules for JAVA multimedia data analyzer, IP cores of specialised processors executing various encryption algorithms and cryptographic hash functions

 

GEOGRAPHY OF COOPERATION

Belarus, Russia

 

MANAGEMENT

Andrew Stankevich
Acting Head of the laboratory
Ph.D., Associate Professor
☏  +375 17 293 89 46
🖂   stankevich@bsuir.by
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CONTACTS

6, P. Brovki str., 220013, Minsk, Republic of Belarus
☏  +375 17 293 89 46, +375 17 293 88 05
🖷  +375 17 390 96 28 
🖂   stankevich@bsuir.by
✎  Offices 301а, 303